IRU3073CQTR【PDF 13/21 页】IC REG DL BCK/LINEAR 16-QSOP

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Sheet目录40

9页 10页 11页 12页 [13页]14页 15页 16页 17页

IRU3073

Rev. 1.0

09/17/03

www.irf.com

LDO Section

Output Voltage Programming

Output voltage for LDO is programmed by reference volt-

age and external voltage divider. The Fb2 pin is the in-

verting input of the error amplifier, which is internally ref-

erenced to 0.8V. The divider is ratioed to provide 0.8V at

the Fb2 pin when the output is at its desired value. The

output voltage is defined by using the following equation

Results to R7=1KV

Figure 13 - Programming the output voltage for LDO.

LDO Power MOSFET Selection

The first step in selecting the power MOSFET for the

linear regulator is to select the maximum RDS(ON) based

on the input to the dropout voltage and the maximum

load current.

Results to: RDS(ON)(MAX) = 0.45V

Note that since the MOSFET RDS(ON) increases with tem-

perature, this number must be divided by ~1.5 in order

to find the RDS(ON)(MAX) at room temperature. The IRLR2703

has a maximum of 0.065V RDS(ON) at room temperature,

which meets our requirements.

R10

VOUT2 = VREF3 1+

( )

For:

VOUT2 = 1.6V

VREF = 0.8V

R10 = 1KV

Layout Consideration

The layout is very important when designing high fre-

quency switching converters. Layout will affect noise

pickup and can cause a good design to perform with

less than expected results.

Start to place the power components. Make all the con-

nections in the top layer with wide, copper filled areas.

The inductor, output capacitor and the MOSFET should

be close to each other as possible. This helps to reduce

the EMI radiated by the power traces due to the high

switching currents through them. Place input capacitor

directly to the drain of the high-side MOSFET. To reduce

the ESR, replace the single input capacitor with two par-

allel units. The feedback part of the system should be

kept away from the inductor and other noise sources

and be placed close to the IC. In multilayer PCB, use

one layer as power ground plane and have a separate

control circuit ground (analog ground), to which all sig-

nals are referenced. The goal is to localize the high cur-

rent path to a separate loop that does not interfere with

the more sensitive analog control function. These two

grounds must be connected together on the PC board

layout at a single point.

Figure 14 - Switching Frequency vs. Rt.

100

150

200

250

300

350

400

450

500

100 150 200 250

300 350 400 450 500 550

Rt (KV)

Fb2

IRU3073

VOUT2

R10

RDS(ON) =

VIN(LDO) - VOUT2

IOUT2

For:

VIN(LDO) = 2.5V

VOUT2 = 1.6V

IOUT2 = 2A

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